forked from amberisvibin/chibi-pc09
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7aac896cef
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7aac896cef
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da1d22988e
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@@ -23,7 +23,7 @@ INCS := $(wildcard $(SRCDIR)*.inc)
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AS := lwasm
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LD := lwlink
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FIX := mot2bin
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FIX := objcopy
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ASFLAGS := -f obj
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LDFLAGS := -f srec -m map.txt -s linkscript
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@@ -36,7 +36,7 @@ all: $(TARGROM)
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# Fix srec into flashable bin file
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$(TARGROM): $(TARGREC)
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$(FIX) -out $@ $<
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$(FIX) -I srec -O binary $< $@
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# Link objects
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$(TARGREC): $(OBJS)
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@@ -41,7 +41,7 @@ SERINIT
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lda #(UARTF_MCR_RTS) ; Enable Request-to-Send
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sta UART_MCR
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lda #'H ; send 'H'
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sta UART_BUFR
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sta UART_THR
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WAIT
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sync ; Wait for interrupts
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@@ -12,9 +12,25 @@
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SECTION SERIAL
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EXPORT SETBAUD
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EXPORT OUTCHAR
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EXPORT OUTSTR
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; Initializes the UART.
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; @param d: new divisor
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SETBAUD
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pshs a ; Preserve A
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lda UART_LCR ; Set only the DLAB bit
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ora #UARTF_LCR_DLAB
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sta UART_LCR
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puls a
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sta UART_DLM ; Store new divisor
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stb UART_DLL
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lda UART_LCR ; Reset DLAB
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anda #$FE
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sta UART_LCR
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rts
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; Writes a char to the UART in non FIFO mode, preserves A.
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; @param b: char to write
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OUTCHAR
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@@ -23,7 +39,7 @@ NOTREADY@
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lda UART_LSR ; if LSR.THRE == 1 then write
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anda UARTF_LSR_THRE
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bne NOTREADY@ ; Loop if UART not ready yet
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stb UART_BUFR ; Write char
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stb UART_THR ; Write char
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puls a ; Restore A
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rts
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@@ -39,7 +55,7 @@ NOTREADY@ ; Loop point for UART waiting
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lda UART_LSR ; Wait for UART to be ready
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anda UARTF_LSR_THRE
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bne NOTREADY@
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stb UART_BUFR ; Actually do our write
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stb UART_THR ; Actually do our write
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bra OUTSTR ; Reset for the next char
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END@ ; Jump point for end of routine
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rts
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