feat(boot)!: added embedded version string + code generation

code/boot/.gitignore

@@ -5,3 +5,6 @@
 *.s19
 map.txt
 build/
+
+# Build system generated files
+src/version.s

code/boot/README.md

@@ -15,12 +15,14 @@ Make makefile is provided for building on Linux.
 To generate an S-Record run:
 
 ```sh
+make generate
 make boot.s19
 ```
 
 To generate a binary run:
 
 ```sh
+make generate
 make
 ```
 

code/boot/genver.sh

@@ -0,0 +1,33 @@
+#!/usr/bin/env sh
+
+# Script to generate version information
+
+# Current git tag
+TAG="$(git describe --always --dirty --tags)"
+DATE="$(date)"
+
+# Output filename
+OUTFILE='src/version.s'
+
+sed -e "s/<TAG>/$TAG/g" -e "s/<DATE>/$DATE/g" <<EOF > "$OUTFILE"
+; CHIBI PC-09 Prototype #1 Boot ROM -- Version Information
+; Copyright (c) 2024-2025 Amber Zeller, Gale Faraday
+; Licensed under MIT
+
+; This file generated by genver.sh
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Boot ROM Version & Build Information
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+  SECTION VERSION
+
+  EXPORT VERMSG
+
+VERMSG
+  fcc "CHIBI PC-09 BOOT ROM <TAG>"
+  fcb \$0A
+  fcn "BUILT <DATE>"
+EOF

code/boot/linkscript

@@ -3,3 +3,4 @@ section SERIAL
 section MEMTEST
 
 section VECTORS high 100000
+section VERSION high

code/boot/makefile

@@ -1,6 +1,6 @@
 # Makefile for CHIBI PC-09 Firmware
 
-.PHONY: all clean
+.PHONY: generate all clean
 .IGNORE: clean
 .DEFAULT_GOAL := all
 
@@ -13,6 +13,7 @@ TARGREC  := $(TARGET).s19
 TARGROM  := $(TARGET).bin
 SRCDIR   := src/
 BUILDDIR := build/
+GENS     := $(SRCDIR)version.s
 SRCS     := $(wildcard $(SRCDIR)*.s)
 OBJS     := $(patsubst $(SRCDIR)%.s,$(BUILDDIR)%.o,$(SRCS))
 INCS     := $(wildcard $(SRCDIR)*.inc)
@@ -47,6 +48,12 @@ $(OBJS): $(BUILDDIR)%.o : $(SRCDIR)%.s
 	-@mkdir -p $(BUILDDIR)
 	$(AS) $(ASFLAGS) -o $@ $<
 
+generate: $(GENS)
+
+$(GENS):
+	./genver.sh
+
 clean:
 	@echo 'Cleaning up intermediary files...'
 	@rm -rv $(TARGROM) $(TARGREC) map.txt $(BUILDDIR)
+	@rm -rv $(GENS)

code/boot/src/reset.s

@@ -26,7 +26,7 @@ NEXT@
   leax 1,x
   cmpx #STACK_DEPTH  ; See if we're at the top of the stack yet
   blo NEXT@          ; Loop if we aren't at the end yet
-  lds STACK_TOP      ; Set S to top of newly cleared stack
+  lds #STACK_TOP     ; Set S to top of newly cleared stack
 
 SERINIT
   ; 8n1 Serial Enable DLAB
@@ -40,8 +40,8 @@ SERINIT
   sta UART_LCR
   lda #(UARTF_MCR_RTS) ; Enable Request-to-Send
   sta UART_MCR
-  lda #'H               ; send 'H'
+  lda #'H              ; send 'H'
-  sta UART_THR
+  sta UART_BUFR
 
 WAIT
   sync                 ; Wait for interrupts

code/boot/src/serial.s

@@ -12,25 +12,9 @@
 
   SECTION SERIAL
 
-  EXPORT SETBAUD
   EXPORT OUTCHAR
   EXPORT OUTSTR
 
-; Initializes the UART.
-; @param d: new divisor
-SETBAUD
-  pshs a              ; Preserve A
-  lda UART_LCR        ; Set only the DLAB bit
-  ora #UARTF_LCR_DLAB
-  sta UART_LCR
-  puls a
-  sta UART_DLM        ; Store new divisor
-  stb UART_DLL
-  lda UART_LCR        ; Reset DLAB
-  anda #$FE
-  sta UART_LCR
-  rts
-
 ; Writes a char to the UART in non FIFO mode, preserves A.
 ; @param b: char to write
 OUTCHAR
@@ -39,7 +23,7 @@ NOTREADY@
   lda UART_LSR         ; if LSR.THRE == 1 then write
   anda UARTF_LSR_THRE
   bne NOTREADY@        ; Loop if UART not ready yet
-  stb UART_THR         ; Write char
+  stb UART_BUFR        ; Write char
   puls a               ; Restore A
   rts
 
@@ -55,7 +39,7 @@ NOTREADY@              ; Loop point for UART waiting
   lda UART_LSR         ; Wait for UART to be ready
   anda UARTF_LSR_THRE
   bne NOTREADY@
-  stb UART_THR         ; Actually do our write
+  stb UART_BUFR        ; Actually do our write
   bra OUTSTR           ; Reset for the next char
 END@                   ; Jump point for end of routine
   rts