1 Commits
main ... serial

Author SHA1 Message Date
7aac896cef feat(boot): new baud setup routine 2025-09-05 08:07:47 -05:00
7 changed files with 22 additions and 52 deletions

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@@ -5,6 +5,3 @@
*.s19
map.txt
build/
# Build system generated files
src/version.s

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@@ -15,14 +15,12 @@ Make makefile is provided for building on Linux.
To generate an S-Record run:
```sh
make generate
make boot.s19
```
To generate a binary run:
```sh
make generate
make
```

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@@ -1,33 +0,0 @@
#!/usr/bin/env sh
# Script to generate version information
# Current git tag
TAG="$(git describe --always --dirty --tags)"
DATE="$(date)"
# Output filename
OUTFILE='src/version.s'
sed -e "s/<TAG>/$TAG/g" -e "s/<DATE>/$DATE/g" <<EOF > "$OUTFILE"
; CHIBI PC-09 Prototype #1 Boot ROM -- Version Information
; Copyright (c) 2024-2025 Amber Zeller, Gale Faraday
; Licensed under MIT
; This file generated by genver.sh
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Boot ROM Version & Build Information
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
SECTION VERSION
EXPORT VERMSG
VERMSG
fcc "CHIBI PC-09 BOOT ROM <TAG>"
fcb \$0A
fcn "BUILT <DATE>"
EOF

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@@ -3,4 +3,3 @@ section SERIAL
section MEMTEST
section VECTORS high 100000
section VERSION high

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@@ -1,6 +1,6 @@
# Makefile for CHIBI PC-09 Firmware
.PHONY: generate all clean
.PHONY: all clean
.IGNORE: clean
.DEFAULT_GOAL := all
@@ -13,7 +13,6 @@ TARGREC := $(TARGET).s19
TARGROM := $(TARGET).bin
SRCDIR := src/
BUILDDIR := build/
GENS := $(SRCDIR)version.s
SRCS := $(wildcard $(SRCDIR)*.s)
OBJS := $(patsubst $(SRCDIR)%.s,$(BUILDDIR)%.o,$(SRCS))
INCS := $(wildcard $(SRCDIR)*.inc)
@@ -48,12 +47,6 @@ $(OBJS): $(BUILDDIR)%.o : $(SRCDIR)%.s
-@mkdir -p $(BUILDDIR)
$(AS) $(ASFLAGS) -o $@ $<
generate: $(GENS)
$(GENS):
./genver.sh
clean:
@echo 'Cleaning up intermediary files...'
@rm -rv $(TARGROM) $(TARGREC) map.txt $(BUILDDIR)
@rm -rv $(GENS)

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@@ -26,7 +26,7 @@ NEXT@
leax 1,x
cmpx #STACK_DEPTH ; See if we're at the top of the stack yet
blo NEXT@ ; Loop if we aren't at the end yet
lds #STACK_TOP ; Set S to top of newly cleared stack
lds STACK_TOP ; Set S to top of newly cleared stack
SERINIT
; 8n1 Serial Enable DLAB
@@ -40,8 +40,8 @@ SERINIT
sta UART_LCR
lda #(UARTF_MCR_RTS) ; Enable Request-to-Send
sta UART_MCR
lda #'H ; send 'H'
sta UART_BUFR
lda #'H ; send 'H'
sta UART_THR
WAIT
sync ; Wait for interrupts

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@@ -12,9 +12,25 @@
SECTION SERIAL
EXPORT SETBAUD
EXPORT OUTCHAR
EXPORT OUTSTR
; Initializes the UART.
; @param d: new divisor
SETBAUD
pshs a ; Preserve A
lda UART_LCR ; Set only the DLAB bit
ora #UARTF_LCR_DLAB
sta UART_LCR
puls a
sta UART_DLM ; Store new divisor
stb UART_DLL
lda UART_LCR ; Reset DLAB
anda #$FE
sta UART_LCR
rts
; Writes a char to the UART in non FIFO mode, preserves A.
; @param b: char to write
OUTCHAR
@@ -23,7 +39,7 @@ NOTREADY@
lda UART_LSR ; if LSR.THRE == 1 then write
anda UARTF_LSR_THRE
bne NOTREADY@ ; Loop if UART not ready yet
stb UART_BUFR ; Write char
stb UART_THR ; Write char
puls a ; Restore A
rts
@@ -39,7 +55,7 @@ NOTREADY@ ; Loop point for UART waiting
lda UART_LSR ; Wait for UART to be ready
anda UARTF_LSR_THRE
bne NOTREADY@
stb UART_BUFR ; Actually do our write
stb UART_THR ; Actually do our write
bra OUTSTR ; Reset for the next char
END@ ; Jump point for end of routine
rts