feat(boot): new stack initialization routine

This commit is contained in:
2025-09-02 16:46:45 -05:00
parent a0427ad949
commit cc8a9fc95f
2 changed files with 27 additions and 3 deletions

View File

@@ -15,6 +15,16 @@ UART_BASE EQU $7F00 ; UART Base Address
ROM_BASE EQU $8000 ; ROM Base Address and Entry Point
VECS_BASE EQU $FFF0 ; Vectors Base Address
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Stack Base Address and Size Information
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
STACK_BOTTOM EQU $0100 ; Bottom address of system stack
STACK_DEPTH EQU $FF ; System stack's depth
STACK_TOP EQU STACK_BOTTOM+STACK_DEPTH ; Top address of system stack
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; UART Registers and Flags

View File

@@ -16,8 +16,21 @@
EXPORT RESET
RESET
CLRSTACK
; Initialize the system stack
lda #$00 ; Initialize A & X to zero out the stack
ldx #$0000
NEXT@
sta STACK_BOTTOM,x ; Write a zero and progress to the next byte
leax 1,x
cmpx #STACK_DEPTH ; See if we're at the top of the stack yet
blo NEXT@ ; Loop if we aren't at the end yet
lds STACK_TOP ; Set S to top of newly cleared stack
SERINIT
; 8n1 Serial Enable DLAB
lda #UARTF_LCR_WLS | UARTF_LCR_DLAB
lda #UARTF_LCR_WLS|UARTF_LCR_DLAB
sta UART_LCR
; REVIEW: Potential endianness hiccough here
ldd #$0C00 ; Set divisor to 12 (9600 baud)
@@ -29,7 +42,8 @@ RESET
sta UART_MCR
lda #'H ; send 'H'
sta UART_BUFR
WAIT@
WAIT
sync ; Wait for interrupts
nop
bra WAIT@
bra WAIT