forked from amberisvibin/chibi-pc09
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f9e2afcc5d
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@@ -1,5 +1,13 @@
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# chibi pc-09
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# chibi pc-09
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## Archived!
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This repo has been archived, and the different parts have been migrated to other repos.
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The PCB for prototype 1 has been moved to https://gitea.ambersplace.net/chibi/pc09-prototype-1
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The firmware has been moved to https://gitea.ambersplace.net/chibi/chibi-firmware
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@@ -1,33 +1,29 @@
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# Boot Firmware for CHIBI PC-09
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# Boot Firmware for CHIBI PC-09
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This is the firmware for the CHIBI PC-09. In the future it will provide the
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TODO: Description of what the firmware does for the PC-09.
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CHIBI with initialization code, a UART driver, some self test features.
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## Building the Firmware
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## Building the Firmware
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Building the firmware from source requires [LWTOOLS](http://www.lwtools.ca/) for
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You will need GNU `make`, and [`asm6809`](https://www.6809.org.uk/asm6809) to
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building S-Records of the ROM, and `mot2bin` from
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build the firmware. Obtaining a working copy of `asm6809` could be difficult if
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[F9DASM](https://github.com/Arakula/f9dasm) for building binary images. A GNU
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you aren't on Debian, Ubuntu, or Windows as instructions for building it are not
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Make makefile is provided for building on Linux.
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given on the `asm6809` website. Functional instructions for building from Git or
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tarball are given here:
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### Using the Makefile
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To generate an S-Record run:
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```sh
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make boot.s19
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```
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To generate a binary run:
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```sh
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```sh
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git clone https://www.6809.org.uk/git/asm6809.git
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cd asm6809
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./configure
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make
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make
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sudo make install
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```
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```
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The makefile also can clean up after itself:
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From there all you should have to do to generate a `boot.bin` is:
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```sh
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```sh
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make clean
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git clone https://github.com/amberisvibin/chibi-pc09.git
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cd chibi-pc09/code/boot
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make
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```
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```
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## Firmware Licensing
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## Firmware Licensing
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@@ -9,7 +9,6 @@
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# ------------------------------------------------------------------------------
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# ------------------------------------------------------------------------------
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TARGET := boot
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TARGET := boot
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TARGREC := $(TARGET).s19
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TARGROM := $(TARGET).bin
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TARGROM := $(TARGET).bin
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SRCDIR := src/
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SRCDIR := src/
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BUILDDIR := build/
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BUILDDIR := build/
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@@ -35,11 +34,11 @@ LDFLAGS := -f srec -m map.txt -s linkscript
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all: $(TARGROM)
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all: $(TARGROM)
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# Fix srec into flashable bin file
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# Fix srec into flashable bin file
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$(TARGROM): $(TARGREC)
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$(TARGROM): $(TARGET).s19
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$(FIX) -out $@ $<
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$(FIX) -out $@ $<
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# Link objects
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# Link objects
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$(TARGREC): $(OBJS)
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$(TARGET).s19: $(OBJS)
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$(LD) $(LDFLAGS) -o $@ $^
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$(LD) $(LDFLAGS) -o $@ $^
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# Assemble objects
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# Assemble objects
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@@ -47,6 +46,7 @@ $(OBJS): $(BUILDDIR)%.o : $(SRCDIR)%.s
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-@mkdir -p $(BUILDDIR)
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-@mkdir -p $(BUILDDIR)
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$(AS) $(ASFLAGS) -o $@ $<
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$(AS) $(ASFLAGS) -o $@ $<
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.IGNORE: clean
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clean:
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clean:
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@echo 'Cleaning up intermediary files...'
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@echo 'Cleaning up intermediary files...'
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@rm -rv $(TARGROM) $(TARGREC) map.txt $(BUILDDIR)
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@rm -rv $(TARGROM) $(TARGET).s19 map.txt $(BUILDDIR)
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@@ -15,16 +15,6 @@ UART_BASE EQU $7F00 ; UART Base Address
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ROM_BASE EQU $8000 ; ROM Base Address and Entry Point
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ROM_BASE EQU $8000 ; ROM Base Address and Entry Point
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VECS_BASE EQU $FFF0 ; Vectors Base Address
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VECS_BASE EQU $FFF0 ; Vectors Base Address
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Stack Base Address and Size Information
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;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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STACK_BOTTOM EQU $0100 ; Bottom address of system stack
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STACK_DEPTH EQU $FF ; System stack's depth
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STACK_TOP EQU STACK_BOTTOM+STACK_DEPTH ; Top address of system stack
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;;
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;; UART Registers and Flags
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;; UART Registers and Flags
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@@ -16,21 +16,8 @@
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EXPORT RESET
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EXPORT RESET
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RESET
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RESET
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CLRSTACK
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; Initialize the system stack
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lda #$00 ; Initialize A & X to zero out the stack
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ldx #$0000
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NEXT@
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sta STACK_BOTTOM,x ; Write a zero and progress to the next byte
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leax 1,x
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cmpx #STACK_DEPTH ; See if we're at the top of the stack yet
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blo NEXT@ ; Loop if we aren't at the end yet
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lds STACK_TOP ; Set S to top of newly cleared stack
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SERINIT
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; 8n1 Serial Enable DLAB
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; 8n1 Serial Enable DLAB
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lda #UARTF_LCR_WLS|UARTF_LCR_DLAB
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lda #UARTF_LCR_WLS | UARTF_LCR_DLAB
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sta UART_LCR
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sta UART_LCR
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; REVIEW: Potential endianness hiccough here
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; REVIEW: Potential endianness hiccough here
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ldd #$0C00 ; Set divisor to 12 (9600 baud)
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ldd #$0C00 ; Set divisor to 12 (9600 baud)
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@@ -42,8 +29,7 @@ SERINIT
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sta UART_MCR
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sta UART_MCR
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lda #'H ; send 'H'
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lda #'H ; send 'H'
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sta UART_BUFR
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sta UART_BUFR
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WAIT@
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WAIT
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sync ; Wait for interrupts
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sync ; Wait for interrupts
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nop
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nop
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bra WAIT
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bra WAIT@
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