|
a176969850
|
add potential clock chip datasheet, fix gerber
|
2024-11-19 13:32:28 -05:00 |
|
|
76c05ba7d7
|
add ground connection to decoupling cap
|
2024-11-15 08:43:07 -05:00 |
|
|
cf420dd89b
|
fix DRC errors
|
2024-11-15 08:39:30 -05:00 |
|
|
f1bb4ecd24
|
remove excess vias
|
2024-11-15 08:21:40 -05:00 |
|
|
480cbb1b03
|
fix dumbass mistake, re generate
|
2024-11-14 10:40:27 -05:00 |
|
|
0ab3548944
|
add silkscreen text, re generate gerbers
|
2024-11-14 10:35:00 -05:00 |
|
|
d854b8428d
|
generate output files
|
2024-11-14 10:21:40 -05:00 |
|
|
e8fdf3ab57
|
move photos
|
2024-11-14 10:15:24 -05:00 |
|
|
145c5b2e47
|
pcb design finished, need to get reviewed
|
2024-11-14 09:27:16 -05:00 |
|
|
1a329bc14a
|
new output image
|
2024-10-28 09:01:02 -04:00 |
|
|
38e9d8d7c3
|
new proto photo
|
2024-10-24 13:00:26 -04:00 |
|
|
f66d3bd2f2
|
almost done with schematic
|
2024-10-24 11:21:04 -04:00 |
|
|
ec1676ee49
|
organization
|
2024-10-24 08:04:04 -04:00 |
|