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a176969850
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add potential clock chip datasheet, fix gerber
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2024-11-19 13:32:28 -05:00 |
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76c05ba7d7
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add ground connection to decoupling cap
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2024-11-15 08:43:07 -05:00 |
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cf420dd89b
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fix DRC errors
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2024-11-15 08:39:30 -05:00 |
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f1bb4ecd24
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remove excess vias
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2024-11-15 08:21:40 -05:00 |
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480cbb1b03
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fix dumbass mistake, re generate
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2024-11-14 10:40:27 -05:00 |
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0ab3548944
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add silkscreen text, re generate gerbers
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2024-11-14 10:35:00 -05:00 |
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d854b8428d
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generate output files
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2024-11-14 10:21:40 -05:00 |
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e8fdf3ab57
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move photos
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2024-11-14 10:15:24 -05:00 |
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145c5b2e47
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pcb design finished, need to get reviewed
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2024-11-14 09:27:16 -05:00 |
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696c05aeec
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fixed CTS/RTS and doubled width of power traces
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2024-11-08 15:55:08 -05:00 |
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efbeeee71a
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schematic work
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2024-11-08 12:25:58 -05:00 |
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8dd483c026
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schematic work once again, getting close
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2024-11-06 13:25:48 -05:00 |
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0e5ccfb3a5
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pcb work, again
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2024-11-05 10:10:16 -05:00 |
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05608102ba
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schematic work
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2024-11-01 09:19:01 -04:00 |
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d1a9f372ae
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pcb work
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2024-10-31 14:50:55 -04:00 |
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8f8d3b2ea8
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fixed schematic, started pcb
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2024-10-31 14:00:01 -04:00 |
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9a5b0bbada
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switch from Tl16C550 to PC16550D due to availability
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2024-10-31 07:49:23 -04:00 |
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1a329bc14a
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new output image
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2024-10-28 09:01:02 -04:00 |
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00f1cd970a
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changed rom, added correct switch, added a million footprints
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2024-10-28 08:01:42 -04:00 |
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38e9d8d7c3
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new proto photo
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2024-10-24 13:00:26 -04:00 |
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80810a836c
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add footprints to schematic
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2024-10-24 12:59:14 -04:00 |
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f66d3bd2f2
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almost done with schematic
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2024-10-24 11:21:04 -04:00 |
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c9b977de08
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new datasheets, sch work, memory map
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2024-10-24 09:41:24 -04:00 |
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10d5234efe
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clocks on sch, 6809 datasheet, jameco xtals
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2024-10-24 08:30:09 -04:00 |
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ec1676ee49
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organization
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2024-10-24 08:04:04 -04:00 |
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