forked from amberisvibin/chibi-pc09
chore: organize pcb files
This commit is contained in:
667
pcb/prototype-1/footprints/2024-10-25_14-53-50.bak
Normal file
667
pcb/prototype-1/footprints/2024-10-25_14-53-50.bak
Normal file
@@ -0,0 +1,667 @@
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)
|
||||
)
|
||||
)
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||||
(pin output line
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||||
(at 15.24 -17.78 180)
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(length 7.62)
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||||
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|
||||
(effects
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(font
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)
|
||||
(number "24"
|
||||
(effects
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|
||||
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|
||||
)
|
||||
(pin unspecified line
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||||
(at 15.24 -15.24 180)
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(length 7.62)
|
||||
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|
||||
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|
||||
(font
|
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|
||||
)
|
||||
(number "31"
|
||||
(effects
|
||||
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|
||||
)
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)
|
||||
)
|
||||
)
|
||||
)
|
||||
42
pcb/prototype-1/footprints/CAP_C315C_MR_X7R_KEM.kicad_mod
Normal file
42
pcb/prototype-1/footprints/CAP_C315C_MR_X7R_KEM.kicad_mod
Normal file
@@ -0,0 +1,42 @@
|
||||
(footprint "CAP_C315C_MR_X7R_KEM" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tags "C315C103J5R5TA ")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at 1.27 0 unlocked) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAP_C315C_MR_X7R_KEM (at 1.27 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 1.27 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -0.9398 0.9398) (end -0.9398 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -0.9398 -0.9398) (end -0.889 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.429 -0.9398) (end 3.4798 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.4798 -0.9398) (end 3.4798 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.4798 0.9398) (end 3.429 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -0.889 0.9398) (end -0.9398 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -0.889 1.524) (end -0.889 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -0.889 -0.9398) (end -0.889 -1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -0.889 -1.524) (end 3.429 -1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.429 -1.524) (end 3.429 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.429 0.9398) (end 3.429 1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.429 1.524) (end -0.889 1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -2.2098 0) (end -0.9398 0) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -1.5748 -0.635) (end -1.5748 0.635) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -2.2098 0) (end -1.01854 0) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -1.5748 -0.635) (end -1.5748 0.635) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -0.762 1.397) (end 3.302 1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 3.302 1.397) (end 3.302 0.675855) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 3.302 -1.397) (end -0.762 -1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -0.762 -1.397) (end -0.762 -1.009697) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -0.635 1.27) (end 3.175 1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start 3.175 1.27) (end 3.175 -1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start 3.175 -1.27) (end -0.635 -1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -0.635 -1.27) (end -0.635 1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -0.762 1.009697) (end -0.762 1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 3.302 -0.675855) (end 3.302 -1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(pad "1" thru_hole rect (at 0 0) (size 1.3716 1.3716) (drill 0.8636) (layers *.Cu *.Mask))
|
||||
(pad "2" thru_hole circle (at 2.54 0) (size 1.3716 1.3716) (drill 0.8636) (layers *.Cu *.Mask))
|
||||
)
|
||||
30
pcb/prototype-1/footprints/CAP_C315_KEM.kicad_mod
Normal file
30
pcb/prototype-1/footprints/CAP_C315_KEM.kicad_mod
Normal file
@@ -0,0 +1,30 @@
|
||||
(footprint "CAP_C315_KEM" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tags "C315C470J5G5TA ")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at 1.27 0 unlocked) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAP_C315_KEM (at 1.27 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 1.27 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -0.889 1.524) (end -0.889 -1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -0.889 -1.524) (end 3.429 -1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.429 -1.524) (end 3.429 1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 3.429 1.524) (end -0.889 1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_arc (start 0.635 1.27) (mid -0.635 0) (end 0.635 -1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_arc (start 1.905 -1.27) (mid 3.175 0) (end 1.905 1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start 0.635 -1.27) (end 1.905 -1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start 0.635 1.27) (end 1.905 1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_arc (start -0.372516 -0.96774) (mid 0.087425 -1.285212) (end 0.635 -1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_arc (start 3.021782 0.839289) (mid 2.529148 1.249819) (end 1.905 1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 0.508 -1.397) (end 2.032 -1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 0.508 1.397) (end 2.032 1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_arc (start 0.635 1.397) (mid 0.087426 1.285213) (end -0.372516 0.96774) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_arc (start 1.905 -1.397) (mid 2.529148 -1.249819) (end 3.021782 -0.839289) (layer "F.SilkS") (width 0.1524))
|
||||
(pad "1" thru_hole rect (at 0 0) (size 1.27 1.27) (drill 0.762) (layers *.Cu *.Mask))
|
||||
(pad "2" thru_hole circle (at 2.54 0) (size 1.27 1.27) (drill 0.762) (layers *.Cu *.Mask))
|
||||
)
|
||||
30
pcb/prototype-1/footprints/CAP_C317_KEM.kicad_mod
Normal file
30
pcb/prototype-1/footprints/CAP_C317_KEM.kicad_mod
Normal file
@@ -0,0 +1,30 @@
|
||||
(footprint "CAP_C317_KEM" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tags "C317C180J5G5TA ")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at 0 0 unlocked) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAP_C317_KEM (at 0 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -2.2098 1.524) (end -2.2098 -1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -2.2098 -1.524) (end 2.2098 -1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 2.2098 -1.524) (end 2.2098 1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 2.2098 1.524) (end -2.2098 1.524) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_arc (start -0.635 1.27) (mid -1.905 0) (end -0.635 -1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_arc (start 0.635 -1.27) (mid 1.905 0) (end 0.635 1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -0.635 -1.27) (end 0.635 -1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -0.635 1.27) (end 0.635 1.27) (layer "F.Fab") (width 0.0254))
|
||||
(fp_arc (start -1.59113 -1.01854) (mid -1.149154 -1.298944) (end -0.635 -1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_arc (start 1.672331 0.93571) (mid 1.202636 1.276479) (end 0.635 1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -0.635 -1.397) (end 0.635 -1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -0.635 1.397) (end 0.635 1.397) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_arc (start -0.635 1.397) (mid -1.149155 1.298943) (end -1.591131 1.018539) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_arc (start 0.635 -1.397) (mid 1.202636 -1.276479) (end 1.672331 -0.93571) (layer "F.SilkS") (width 0.1524))
|
||||
(pad "1" thru_hole rect (at -1.27 0) (size 1.3716 1.3716) (drill 0.8636) (layers *.Cu *.Mask))
|
||||
(pad "2" thru_hole circle (at 1.27 0) (size 1.3716 1.3716) (drill 0.8636) (layers *.Cu *.Mask))
|
||||
)
|
||||
40
pcb/prototype-1/footprints/CAP_C320C_MR_X7R_KEM.kicad_mod
Normal file
40
pcb/prototype-1/footprints/CAP_C320C_MR_X7R_KEM.kicad_mod
Normal file
@@ -0,0 +1,40 @@
|
||||
(footprint "CAP_C320C_MR_X7R_KEM" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tags "C320C104J5R5TA7301 ")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at 1.27 0 unlocked) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAP_C320C_MR_X7R_KEM (at 1.27 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 1.27 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -1.524 0.9398) (end -1.524 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -1.524 -0.9398) (end -1.524 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 4.064 -0.9398) (end 4.064 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 4.064 -0.9398) (end 4.064 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 4.064 0.9398) (end 4.064 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -1.524 0.9398) (end -1.524 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -1.524 1.8415) (end -1.524 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -1.524 -0.9398) (end -1.524 -1.8415) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -1.524 -1.8415) (end 4.064 -1.8415) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 4.064 -1.8415) (end 4.064 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 4.064 0.9398) (end 4.064 1.8415) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 4.064 1.8415) (end -1.524 1.8415) (layer "F.CrtYd") (width 0.1524))
|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start -1.5748 -0.635) (end -1.5748 0.635) (layer "F.SilkS") (width 0.1524))
|
||||
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|
||||
(fp_line (start 3.937 1.7145) (end 3.937 -1.7145) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 3.937 -1.7145) (end -1.397 -1.7145) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -1.397 -1.7145) (end -1.397 1.7145) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -1.27 1.5875) (end 3.81 1.5875) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start 3.81 1.5875) (end 3.81 -1.5875) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start 3.81 -1.5875) (end -1.27 -1.5875) (layer "F.Fab") (width 0.0254))
|
||||
(fp_line (start -1.27 -1.5875) (end -1.27 1.5875) (layer "F.Fab") (width 0.0254))
|
||||
(pad "1" thru_hole rect (at 0 0) (size 1.3716 1.3716) (drill 0.8636) (layers *.Cu *.Mask))
|
||||
(pad "2" thru_hole circle (at 2.54 0) (size 1.3716 1.3716) (drill 0.8636) (layers *.Cu *.Mask))
|
||||
)
|
||||
40
pcb/prototype-1/footprints/CAP_C330C_MR_X7R_KEM.kicad_mod
Normal file
40
pcb/prototype-1/footprints/CAP_C330C_MR_X7R_KEM.kicad_mod
Normal file
@@ -0,0 +1,40 @@
|
||||
(footprint "CAP_C330C_MR_X7R_KEM" (version 20211014) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(tags "C330C105J5R5TA ")
|
||||
(attr through_hole)
|
||||
(fp_text reference "REF**" (at 2.54 0 unlocked) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value CAP_C330C_MR_X7R_KEM (at 2.54 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "${REFERENCE}" (at 2.54 0 unlocked) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -1.27 0.9398) (end -1.27 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start -1.27 -0.9398) (end -1.27 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 6.35 -0.9398) (end 6.35 -0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
(fp_line (start 6.35 -0.9398) (end 6.35 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
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|
||||
(fp_line (start -1.27 0.9398) (end -1.27 0.9398) (layer "F.CrtYd") (width 0.1524))
|
||||
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|
||||
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|
||||
(fp_line (start -1.27 -2.286) (end 6.35 -2.286) (layer "F.CrtYd") (width 0.1524))
|
||||
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|
||||
(fp_line (start 6.35 0.9398) (end 6.35 2.286) (layer "F.CrtYd") (width 0.1524))
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
(fp_line (start -1.5748 -0.635) (end -1.5748 0.635) (layer "F.SilkS") (width 0.1524))
|
||||
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|
||||
(fp_line (start 6.223 2.159) (end 6.223 -2.159) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start 6.223 -2.159) (end -1.143 -2.159) (layer "F.SilkS") (width 0.1524))
|
||||
(fp_line (start -1.143 -2.159) (end -1.143 2.159) (layer "F.SilkS") (width 0.1524))
|
||||
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|
||||
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|
||||
(fp_line (start 6.096 -2.032) (end -1.016 -2.032) (layer "F.Fab") (width 0.0254))
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667
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180
pcb/prototype-1/footprints/SW_B3F-1000_OMR.bak
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180
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58
pcb/prototype-1/footprints/SW_B3F-1000_OMR.kicad_mod
Normal file
58
pcb/prototype-1/footprints/SW_B3F-1000_OMR.kicad_mod
Normal file
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348
pcb/prototype-1/footprints/SW_B3F-1000_OMR.kicad_sym
Normal file
348
pcb/prototype-1/footprints/SW_B3F-1000_OMR.kicad_sym
Normal file
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D12*
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||||
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||||
D12*
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||||
X53750000Y-43015000D03*
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||||
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||||
D14*
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||||
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%TD*%
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D13*
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||||
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||||
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D14*
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D18*
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%TD*%
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D12*
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X41820000Y-113285000D03*
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X41820000Y-110745000D03*
|
||||
X41820000Y-108205000D03*
|
||||
X41820000Y-105665000D03*
|
||||
X41820000Y-103125000D03*
|
||||
%TD*%
|
||||
D13*
|
||||
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|
||||
X116500000Y-30000000D03*
|
||||
D14*
|
||||
X113960000Y-30000000D03*
|
||||
%TD*%
|
||||
D13*
|
||||
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||||
X105177100Y-102500000D03*
|
||||
D14*
|
||||
X102637100Y-102500000D03*
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||||
%TD*%
|
||||
D13*
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||||
%TO.C,C1*%
|
||||
X99900000Y-66000000D03*
|
||||
D14*
|
||||
X102440000Y-66000000D03*
|
||||
%TD*%
|
||||
D11*
|
||||
%TO.C,U4*%
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||||
X108620000Y-38000000D03*
|
||||
D12*
|
||||
X106080000Y-38000000D03*
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||||
X103540000Y-38000000D03*
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||||
X101000000Y-38000000D03*
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||||
X98460000Y-38000000D03*
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||||
X95920000Y-38000000D03*
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X93380000Y-38000000D03*
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X90840000Y-38000000D03*
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X88300000Y-38000000D03*
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X83220000Y-38000000D03*
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X78140000Y-38000000D03*
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X70520000Y-38000000D03*
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X67980000Y-38000000D03*
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||||
X65440000Y-38000000D03*
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||||
X62900000Y-38000000D03*
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||||
X60360000Y-38000000D03*
|
||||
X60360000Y-53240000D03*
|
||||
X62900000Y-53240000D03*
|
||||
X65440000Y-53240000D03*
|
||||
X67980000Y-53240000D03*
|
||||
X70520000Y-53240000D03*
|
||||
X73060000Y-53240000D03*
|
||||
X75600000Y-53240000D03*
|
||||
X78140000Y-53240000D03*
|
||||
X80680000Y-53240000D03*
|
||||
X83220000Y-53240000D03*
|
||||
X85760000Y-53240000D03*
|
||||
X88300000Y-53240000D03*
|
||||
X90840000Y-53240000D03*
|
||||
X93380000Y-53240000D03*
|
||||
X95920000Y-53240000D03*
|
||||
X98460000Y-53240000D03*
|
||||
X101000000Y-53240000D03*
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||||
X103540000Y-53240000D03*
|
||||
X106080000Y-53240000D03*
|
||||
X108620000Y-53240000D03*
|
||||
%TD*%
|
||||
D10*
|
||||
%TO.C,R5*%
|
||||
X75500000Y-31315000D03*
|
||||
D12*
|
||||
X75500000Y-26235000D03*
|
||||
%TD*%
|
||||
D10*
|
||||
%TO.C,R6*%
|
||||
X113500000Y-85685000D03*
|
||||
D12*
|
||||
X113500000Y-90765000D03*
|
||||
%TD*%
|
||||
M02*
|
||||
29
pcb/prototype-1/output/gerber/prototype-1-B_Silkscreen.gbr
Normal file
29
pcb/prototype-1/output/gerber/prototype-1-B_Silkscreen.gbr
Normal file
@@ -0,0 +1,29 @@
|
||||
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||||
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|
||||
%MOMM*%
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||||
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||||
G01*
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||||
G04 APERTURE LIST*
|
||||
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||||
G04 APERTURE END LIST*
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||||
D10*
|
||||
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|
||||
X111876998Y-17709999D02*
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||||
G75*
|
||||
G02*
|
||||
X111622998Y-17709999I-127000J0D01*
|
||||
G01*
|
||||
X111622998Y-17709999D02*
|
||||
G75*
|
||||
G02*
|
||||
X111876998Y-17709999I127000J0D01*
|
||||
G01*
|
||||
%TD*%
|
||||
M02*
|
||||
23
pcb/prototype-1/output/gerber/prototype-1-Edge_Cuts.gbr
Normal file
23
pcb/prototype-1/output/gerber/prototype-1-Edge_Cuts.gbr
Normal file
@@ -0,0 +1,23 @@
|
||||
%TF.GenerationSoftware,KiCad,Pcbnew,8.0.6*%
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||||
%TF.CreationDate,2024-11-15T08:42:14-05:00*%
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G04 Created by KiCad (PCBNEW 8.0.6) date 2024-11-15 08:42:14*
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||||
%MOMM*%
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||||
%LPD*%
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||||
G01*
|
||||
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%TA.AperFunction,Profile*%
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||||
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||||
D10*
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||||
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||||
X126250000Y-14250000D01*
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||||
X126250000Y-154250000D01*
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||||
X26250000Y-154250000D01*
|
||||
X26250000Y-14250000D01*
|
||||
M02*
|
||||
15436
pcb/prototype-1/output/gerber/prototype-1-F_Cu.gbr
Normal file
15436
pcb/prototype-1/output/gerber/prototype-1-F_Cu.gbr
Normal file
File diff suppressed because it is too large
Load Diff
404
pcb/prototype-1/output/gerber/prototype-1-F_Mask.gbr
Normal file
404
pcb/prototype-1/output/gerber/prototype-1-F_Mask.gbr
Normal file
@@ -0,0 +1,404 @@
|
||||
%TF.GenerationSoftware,KiCad,Pcbnew,8.0.6*%
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||||
%TF.CreationDate,2024-11-15T08:42:14-05:00*%
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G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
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G04 Created by KiCad (PCBNEW 8.0.6) date 2024-11-15 08:42:14*
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||||
%MOMM*%
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||||
%LPD*%
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||||
G01*
|
||||
G04 APERTURE LIST*
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%ADD10C,1.600000*%
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|
||||
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||||
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||||
%ADD16C,1.500000*%
|
||||
%ADD17R,1.700000X1.700000*%
|
||||
%ADD18O,1.700000X1.700000*%
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||||
G04 APERTURE END LIST*
|
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6772
pcb/prototype-1/output/gerber/prototype-1-F_Silkscreen.gbr
Normal file
File diff suppressed because it is too large
Load Diff
111
pcb/prototype-1/output/gerber/prototype-1-job.gbrjob
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111
pcb/prototype-1/output/gerber/prototype-1-job.gbrjob
Normal file
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||||
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||||
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|
||||
},
|
||||
{
|
||||
"Path": "6309-board-prototype-1.kicad_pro-Edge_Cuts.gbr",
|
||||
"FileFunction": "Profile",
|
||||
"FilePolarity": "Positive"
|
||||
}
|
||||
],
|
||||
"MaterialStackup": [
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Material": "Liquid Photo",
|
||||
"Name": "Top Silk Screen"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Thickness": 0.0152,
|
||||
"Name": "Top Solder Mask"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.0356,
|
||||
"Name": "F.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "Dielectric",
|
||||
"Thickness": 1.524,
|
||||
"Material": "FR4",
|
||||
"Name": "F.Cu/B.Cu",
|
||||
"Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
|
||||
},
|
||||
{
|
||||
"Type": "Copper",
|
||||
"Thickness": 0.0356,
|
||||
"Name": "B.Cu"
|
||||
},
|
||||
{
|
||||
"Type": "SolderMask",
|
||||
"Thickness": 0.0152,
|
||||
"Name": "Bottom Solder Mask"
|
||||
},
|
||||
{
|
||||
"Type": "Legend",
|
||||
"Material": "Liquid Photo",
|
||||
"Name": "Bottom Silk Screen"
|
||||
}
|
||||
]
|
||||
}
|
||||
22
pcb/prototype-1/output/prototype-1.csv
Normal file
22
pcb/prototype-1/output/prototype-1.csv
Normal file
@@ -0,0 +1,22 @@
|
||||
"Id";"Designator";"Footprint";"Quantity";"Designation";"Supplier and ref";
|
||||
1;"C11";"C_Disc_D5.0mm_W2.5mm_P5.00mm";1;"47pF";;;
|
||||
2;"U6";"DIP-14_W7.62mm_Socket";1;"74HCT32";;;
|
||||
3;"C14,C6,C3,C7,C2,C5,C16,C4,C1";"CAP_C320C_MR_X7R_KEM";9;"0.1uF";;;
|
||||
4;"SW1";"SW_B3F-1000_OMR";1;"B3F-1000";;;
|
||||
5;"R3";"R_Axial_DIN0207_L6.3mm_D2.5mm_P5.08mm_Vertical";1;"1M";;;
|
||||
6;"X1";"Crystal_HC49-U_Vertical";1;"12MHz";;;
|
||||
7;"R9,R4,R8,R7,R5,R6";"R_Axial_DIN0207_L6.3mm_D2.5mm_P5.08mm_Vertical";6;"100K";;;
|
||||
8;"C8,C9";"CAP_C317_KEM";2;"24pF";;;
|
||||
9;"X2";"Crystal_HC49-U_Vertical";1;"1.8432 MHz";;;
|
||||
10;"U3";"DIP-32_W15.24mm";1;"39FS010";;;
|
||||
11;"J2";"PinHeader_1x06_P2.54mm_Vertical";1;"FTDI";;;
|
||||
12;"U2";"DIP-28_W15.24mm_Socket";1;"62256";;;
|
||||
13;"U5";"DIP-14_W7.62mm_Socket";1;"74HCT04";;;
|
||||
14;"C15";"CAP_C315C_MR_X7R_KEM";1;"0.01uF";;;
|
||||
15;"U1";"DIP-40_W15.24mm_Socket";1;"63C09";;;
|
||||
16;"R2";"R_Axial_DIN0207_L6.3mm_D2.5mm_P5.08mm_Vertical";1;"1.5k";;;
|
||||
17;"C13";"CAP_C330C_MR_X7R_KEM";1;"1uF";;;
|
||||
18;"C12";"CAP_C317_KEM";1;"18pF";;;
|
||||
19;"J1";"PinHeader_1x02_P2.54mm_Vertical";1;"PWR";;;
|
||||
20;"U7";"DIP-14_W7.62mm_Socket";1;"74HCT30";;;
|
||||
21;"U4";"DIP-40_W15.24mm_Socket";1;"16550";;;
|
||||
|
Can't render this file because it has a wrong number of fields in line 2.
|
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pcb/prototype-1/photos/pcbproto.pdf
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pcb/prototype-1/photos/pcbproto.pdf
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pcb/prototype-1/photos/pcbproto.png
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|
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pcb/prototype-1/photos/proto2.pdf
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|
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pcb/prototype-1/photos/proto3.pdf
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pcb/prototype-1/photos/proto3.pdf
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pcb/prototype-1/photos/proto3.png
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pcb/prototype-1/photos/proto3.png
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|
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pcb/prototype-1/photos/proto4.pdf
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pcb/prototype-1/photos/proto4.pdf
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BIN
pcb/prototype-1/photos/proto4.png
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pcb/prototype-1/photos/proto4.png
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|
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pcb/prototype-1/photos/proto5.pdf
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BIN
pcb/prototype-1/photos/proto5.pdf
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BIN
pcb/prototype-1/photos/proto5.png
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pcb/prototype-1/photos/proto5.png
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|
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pcb/prototype-1/photos/proto6.pdf
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BIN
pcb/prototype-1/photos/proto6.pdf
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BIN
pcb/prototype-1/photos/proto6.png
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BIN
pcb/prototype-1/photos/proto6.png
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|
After Width: | Height: | Size: 655 KiB |
91
pcb/prototype-1/prototype-1.kicad_dru
Normal file
91
pcb/prototype-1/prototype-1.kicad_dru
Normal file
@@ -0,0 +1,91 @@
|
||||
(version 1)
|
||||
#Kicad 7
|
||||
|
||||
# 2-layer, 1oz copper
|
||||
(rule "Minimum Trace Width (outer layer)"
|
||||
(constraint track_width (min 5mil))
|
||||
(layer outer)
|
||||
(condition "A.Type == 'track'"))
|
||||
|
||||
(rule "Minimum Trace Spacing (outer layer)"
|
||||
(constraint clearance (min 5mil))
|
||||
(layer outer)
|
||||
(condition "A.Type == 'track' && B.Type == A.Type"))
|
||||
|
||||
# silkscreen (Kicad 7 only)
|
||||
(rule "Minimum Text"
|
||||
(constraint text_thickness (min 0.15mm))
|
||||
(constraint text_height (min 1mm))
|
||||
(layer "?.Silkscreen"))
|
||||
|
||||
(rule "Pad to Silkscreen"
|
||||
(constraint silk_clearance (min 0.15mm))
|
||||
(layer outer)
|
||||
(condition "A.Type == 'pad' && (B.Type == 'text' || B.Type == 'graphic')"))
|
||||
|
||||
# edge clearance
|
||||
(rule "Trace to Outline"
|
||||
(constraint edge_clearance (min 0.3mm))
|
||||
(condition "A.Type == 'track'"))
|
||||
|
||||
# This would override board outline and milled areas
|
||||
#(rule "Trace to V-Cut"
|
||||
# (constraint clearance (min 0.4mm))
|
||||
# (condition "A.Type == 'track' && B.Layer == 'Edge.Cuts'"))
|
||||
|
||||
# drill/hole size
|
||||
(rule "drill hole size (mechanical)"
|
||||
(constraint hole_size (min 0.2mm) (max 6.3mm)))
|
||||
|
||||
(rule "Minimum Via Hole Size"
|
||||
(constraint hole_size (min 0.2mm))
|
||||
(condition "A.Type == 'via'"))
|
||||
|
||||
(rule "Minimum Via Diameter"
|
||||
(constraint via_diameter (min 0.45mm))
|
||||
(condition "A.Type == 'via'"))
|
||||
|
||||
(rule "PTH Hole Size"
|
||||
(constraint hole_size (min 0.2mm) (max 6.35mm))
|
||||
(condition "A.isPlated()"))
|
||||
|
||||
(rule "Minimum Non-plated Hole Size"
|
||||
(constraint hole_size (min 0.5mm))
|
||||
(condition "A.Type == 'pad' && !A.isPlated()"))
|
||||
|
||||
(rule "Minimum Castellated Hole Size"
|
||||
(constraint hole_size (min 0.6mm))
|
||||
(condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'"))
|
||||
|
||||
# clearance
|
||||
(rule "hole to hole clearance (different nets)"
|
||||
(constraint hole_to_hole (min 0.5mm))
|
||||
(condition "A.Net != B.Net"))
|
||||
|
||||
(rule "via to track clearance"
|
||||
(constraint hole_clearance (min 0.254mm))
|
||||
(condition "A.Type == 'via' && B.Type == 'track'"))
|
||||
|
||||
(rule "via to via clearance (same nets)"
|
||||
(constraint hole_to_hole (min 0.254mm))
|
||||
(condition "A.Type == 'via' && B.Type == A.Type && A.Net == B.Net"))
|
||||
|
||||
(rule "pad to pad clearance (with hole, different nets)"
|
||||
(constraint hole_to_hole (min 0.5mm))
|
||||
(condition "A.Type == 'pad' && B.Type == A.Type && A.Net != B.Net"))
|
||||
|
||||
(rule "pad to pad clearance (without hole, different nets)"
|
||||
(constraint clearance (min 0.127mm))
|
||||
(condition "A.Type == 'pad' && B.Type == A.Type && A.Net != B.Net"))
|
||||
|
||||
(rule "NPTH to Track clearance)"
|
||||
(constraint hole_clearance (min 0.254mm))
|
||||
(condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'"))
|
||||
|
||||
(rule "PTH to Track clearance)"
|
||||
(constraint hole_clearance (min 0.33mm))
|
||||
(condition "A.isPlated() && B.Type == 'track'"))
|
||||
|
||||
(rule "Pad to Track clearance)"
|
||||
(constraint clearance (min 0.2mm))
|
||||
(condition "A.isPlated() && B.Type == 'track'"))
|
||||
25667
pcb/prototype-1/prototype-1.kicad_pcb
Normal file
25667
pcb/prototype-1/prototype-1.kicad_pcb
Normal file
File diff suppressed because it is too large
Load Diff
83
pcb/prototype-1/prototype-1.kicad_prl
Normal file
83
pcb/prototype-1/prototype-1.kicad_prl
Normal file
@@ -0,0 +1,83 @@
|
||||
{
|
||||
"board": {
|
||||
"active_layer": 0,
|
||||
"active_layer_preset": "All Layers",
|
||||
"auto_track_width": true,
|
||||
"hidden_netclasses": [],
|
||||
"hidden_nets": [],
|
||||
"high_contrast_mode": 1,
|
||||
"net_color_mode": 1,
|
||||
"opacity": {
|
||||
"images": 0.6,
|
||||
"pads": 1.0,
|
||||
"tracks": 1.0,
|
||||
"vias": 1.0,
|
||||
"zones": 0.6
|
||||
},
|
||||
"selection_filter": {
|
||||
"dimensions": true,
|
||||
"footprints": true,
|
||||
"graphics": true,
|
||||
"keepouts": true,
|
||||
"lockedItems": false,
|
||||
"otherItems": true,
|
||||
"pads": true,
|
||||
"text": true,
|
||||
"tracks": true,
|
||||
"vias": true,
|
||||
"zones": true
|
||||
},
|
||||
"visible_items": [
|
||||
0,
|
||||
1,
|
||||
2,
|
||||
3,
|
||||
4,
|
||||
5,
|
||||
8,
|
||||
9,
|
||||
10,
|
||||
11,
|
||||
12,
|
||||
13,
|
||||
15,
|
||||
16,
|
||||
17,
|
||||
18,
|
||||
19,
|
||||
20,
|
||||
21,
|
||||
22,
|
||||
23,
|
||||
24,
|
||||
25,
|
||||
26,
|
||||
27,
|
||||
28,
|
||||
29,
|
||||
30,
|
||||
32,
|
||||
33,
|
||||
34,
|
||||
35,
|
||||
36,
|
||||
39,
|
||||
40
|
||||
],
|
||||
"visible_layers": "fffffff_ffffffff",
|
||||
"zone_display_mode": 1
|
||||
},
|
||||
"git": {
|
||||
"repo_password": "",
|
||||
"repo_type": "",
|
||||
"repo_username": "",
|
||||
"ssh_key": ""
|
||||
},
|
||||
"meta": {
|
||||
"filename": "prototype-1.kicad_prl",
|
||||
"version": 3
|
||||
},
|
||||
"project": {
|
||||
"files": []
|
||||
}
|
||||
}
|
||||
615
pcb/prototype-1/prototype-1.kicad_pro
Normal file
615
pcb/prototype-1/prototype-1.kicad_pro
Normal file
@@ -0,0 +1,615 @@
|
||||
{
|
||||
"board": {
|
||||
"3dviewports": [],
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"apply_defaults_to_fp_fields": false,
|
||||
"apply_defaults_to_fp_shapes": false,
|
||||
"apply_defaults_to_fp_text": false,
|
||||
"board_outline_line_width": 0.05,
|
||||
"copper_line_width": 0.2,
|
||||
"copper_text_italic": false,
|
||||
"copper_text_size_h": 1.5,
|
||||
"copper_text_size_v": 1.5,
|
||||
"copper_text_thickness": 0.3,
|
||||
"copper_text_upright": false,
|
||||
"courtyard_line_width": 0.05,
|
||||
"dimension_precision": 4,
|
||||
"dimension_units": 3,
|
||||
"dimensions": {
|
||||
"arrow_length": 1270000,
|
||||
"extension_offset": 500000,
|
||||
"keep_text_aligned": true,
|
||||
"suppress_zeroes": false,
|
||||
"text_position": 0,
|
||||
"units_format": 1
|
||||
},
|
||||
"fab_line_width": 0.1,
|
||||
"fab_text_italic": false,
|
||||
"fab_text_size_h": 1.0,
|
||||
"fab_text_size_v": 1.0,
|
||||
"fab_text_thickness": 0.15,
|
||||
"fab_text_upright": false,
|
||||
"other_line_width": 0.1,
|
||||
"other_text_italic": false,
|
||||
"other_text_size_h": 1.0,
|
||||
"other_text_size_v": 1.0,
|
||||
"other_text_thickness": 0.15,
|
||||
"other_text_upright": false,
|
||||
"pads": {
|
||||
"drill": 0.762,
|
||||
"height": 1.524,
|
||||
"width": 1.524
|
||||
},
|
||||
"silk_line_width": 0.1,
|
||||
"silk_text_italic": false,
|
||||
"silk_text_size_h": 1.0,
|
||||
"silk_text_size_v": 1.0,
|
||||
"silk_text_thickness": 0.1,
|
||||
"silk_text_upright": false,
|
||||
"zones": {
|
||||
"min_clearance": 0.5
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"connection_width": "warning",
|
||||
"copper_edge_clearance": "error",
|
||||
"copper_sliver": "warning",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint": "error",
|
||||
"footprint_symbol_mismatch": "warning",
|
||||
"footprint_type_mismatch": "ignore",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"holes_co_located": "warning",
|
||||
"invalid_outline": "error",
|
||||
"isolated_copper": "warning",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"lib_footprint_issues": "warning",
|
||||
"lib_footprint_mismatch": "warning",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
|
||||
"padstack": "warning",
|
||||
"pth_inside_courtyard": "ignore",
|
||||
"shorting_items": "error",
|
||||
"silk_edge_clearance": "warning",
|
||||
"silk_over_copper": "warning",
|
||||
"silk_overlap": "warning",
|
||||
"skew_out_of_range": "error",
|
||||
"solder_mask_bridge": "error",
|
||||
"starved_thermal": "error",
|
||||
"text_height": "warning",
|
||||
"text_thickness": "warning",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
|
||||
"tracks_crossing": "error",
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
"rules": {
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.1524,
|
||||
"min_connection": 0.0,
|
||||
"min_copper_edge_clearance": 0.381,
|
||||
"min_hole_clearance": 0.25,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.2,
|
||||
"min_microvia_drill": 0.1,
|
||||
"min_resolved_spokes": 2,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_text_height": 0.8,
|
||||
"min_text_thickness": 0.08,
|
||||
"min_through_hole_diameter": 0.254,
|
||||
"min_track_width": 0.1524,
|
||||
"min_via_annular_width": 0.127,
|
||||
"min_via_diameter": 0.5,
|
||||
"solder_mask_to_copper_clearance": 0.0,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"teardrop_options": [
|
||||
{
|
||||
"td_onpadsmd": true,
|
||||
"td_onroundshapesonly": false,
|
||||
"td_ontrackend": false,
|
||||
"td_onviapad": true
|
||||
}
|
||||
],
|
||||
"teardrop_parameters": [
|
||||
{
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
},
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||||
{
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||||
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||||
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{
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||||
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|
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}
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|
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|
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|
||||
0.4
|
||||
],
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
},
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
"single_sided": false,
|
||||
"spacing": 0.6
|
||||
}
|
||||
},
|
||||
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|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false
|
||||
},
|
||||
"ipc2581": {
|
||||
"dist": "",
|
||||
"distpn": "",
|
||||
"internal_id": "",
|
||||
"mfg": "",
|
||||
"mpn": ""
|
||||
},
|
||||
"layer_presets": [],
|
||||
"viewports": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
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||||
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],
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|
||||
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|
||||
2
|
||||
]
|
||||
],
|
||||
"rule_severities": {
|
||||
"bus_definition_conflict": "error",
|
||||
"bus_entry_needed": "error",
|
||||
"bus_to_bus_conflict": "error",
|
||||
"bus_to_net_conflict": "error",
|
||||
"conflicting_netclasses": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"endpoint_off_grid": "warning",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
"lib_symbol_issues": "warning",
|
||||
"missing_bidi_pin": "warning",
|
||||
"missing_input_pin": "warning",
|
||||
"missing_power_pin": "error",
|
||||
"missing_unit": "warning",
|
||||
"multiple_net_names": "warning",
|
||||
"net_not_bus_member": "warning",
|
||||
"no_connect_connected": "warning",
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "error",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"simulation_model_issue": "ignore",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
},
|
||||
"libraries": {
|
||||
"pinned_footprint_libs": [
|
||||
"Custom"
|
||||
],
|
||||
"pinned_symbol_libs": [
|
||||
"Custom"
|
||||
]
|
||||
},
|
||||
"meta": {
|
||||
"filename": "prototype-1.kicad_pro",
|
||||
"version": 1
|
||||
},
|
||||
"net_settings": {
|
||||
"classes": [
|
||||
{
|
||||
"bus_width": 12,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "Default",
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
"track_width": 0.2,
|
||||
"via_diameter": 0.6,
|
||||
"via_drill": 0.3,
|
||||
"wire_width": 6
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 3
|
||||
},
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": []
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
"gencad": "",
|
||||
"idf": "",
|
||||
"netlist": "",
|
||||
"plot": "output/gerber/",
|
||||
"pos_files": "",
|
||||
"specctra_dsn": "",
|
||||
"step": "",
|
||||
"svg": "",
|
||||
"vrml": ""
|
||||
},
|
||||
"page_layout_descr_file": ""
|
||||
},
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"bom_export_filename": "bom.csv",
|
||||
"bom_fmt_presets": [],
|
||||
"bom_fmt_settings": {
|
||||
"field_delimiter": ",",
|
||||
"keep_line_breaks": false,
|
||||
"keep_tabs": false,
|
||||
"name": "CSV",
|
||||
"ref_delimiter": ",",
|
||||
"ref_range_delimiter": "",
|
||||
"string_delimiter": "\""
|
||||
},
|
||||
"bom_presets": [],
|
||||
"bom_settings": {
|
||||
"exclude_dnp": false,
|
||||
"fields_ordered": [
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Reference",
|
||||
"name": "Reference",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "Value",
|
||||
"name": "Value",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Datasheet",
|
||||
"name": "Datasheet",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Footprint",
|
||||
"name": "Footprint",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Qty",
|
||||
"name": "${QUANTITY}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": true,
|
||||
"label": "DNP",
|
||||
"name": "${DNP}",
|
||||
"show": true
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "#",
|
||||
"name": "${ITEM_NUMBER}",
|
||||
"show": false
|
||||
},
|
||||
{
|
||||
"group_by": false,
|
||||
"label": "Description",
|
||||
"name": "Description",
|
||||
"show": false
|
||||
}
|
||||
],
|
||||
"filter_string": "",
|
||||
"group_symbols": true,
|
||||
"name": "",
|
||||
"sort_asc": true,
|
||||
"sort_field": "Reference"
|
||||
},
|
||||
"connection_grid_size": 50.0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_line_thickness": 6.0,
|
||||
"default_text_size": 50.0,
|
||||
"field_names": [],
|
||||
"intersheets_ref_own_page": false,
|
||||
"intersheets_ref_prefix": "",
|
||||
"intersheets_ref_short": false,
|
||||
"intersheets_ref_show": false,
|
||||
"intersheets_ref_suffix": "",
|
||||
"junction_size_choice": 3,
|
||||
"label_size_ratio": 0.375,
|
||||
"operating_point_overlay_i_precision": 3,
|
||||
"operating_point_overlay_i_range": "~A",
|
||||
"operating_point_overlay_v_precision": 3,
|
||||
"operating_point_overlay_v_range": "~V",
|
||||
"overbar_offset_ratio": 1.23,
|
||||
"pin_symbol_size": 25.0,
|
||||
"text_offset_ratio": 0.15
|
||||
},
|
||||
"legacy_lib_dir": "",
|
||||
"legacy_lib_list": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
},
|
||||
"net_format_name": "",
|
||||
"page_layout_descr_file": "",
|
||||
"plot_directory": "",
|
||||
"spice_current_sheet_as_root": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"spice_model_current_sheet_as_root": true,
|
||||
"spice_save_all_currents": false,
|
||||
"spice_save_all_dissipations": false,
|
||||
"spice_save_all_voltages": false,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"73f02399-4449-4d3e-bf52-6d1b4c7a62b4",
|
||||
"Root"
|
||||
]
|
||||
],
|
||||
"text_variables": {}
|
||||
}
|
||||
23047
pcb/prototype-1/prototype-1.kicad_sch
Normal file
23047
pcb/prototype-1/prototype-1.kicad_sch
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user