feat(bios): BIOS interface accessible through SWI3

bbmkhash.c

@@ -25,7 +25,7 @@ int main(void) {
 ; Copyright (c) 2025 Gale Faraday\n\
 ; Licensed under MIT\n\
 \n\
-; This file generated by bbmkcmds.c\n\
+; This file generated by bbmkhash.c\n\
 \n\
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\
 ;;\n\

linkscript

@@ -1,9 +1,17 @@
+; BIOS
 section RESET load 8000
 section SERIAL
+
+; BIOS Interface and Utilities
+section BIOSINT load 8800
 section MEMTEST
 
+; BUZBEE Monitor
 section BUZBEE
 section BBHASHES
 
+; Static Data
 section VECTORS high 100000
 section VERSION high
+
+entry 8000

src/buzbee.s

@@ -44,6 +44,7 @@ BUZBEE
   bsr INPLOOP        ; Fill input buffer.
   cmpy #0            ; No data?
   beq BUZBEE         ;  Try again...
+  lbsr MKINSENSITIVE ; Make the input buffer case insensitive
   lbsr TOKENIZE      ; Try to tokenize the input buffer
   lbsr RUNIF         ; Execute token buffer, handling any errors
   bra BUZBEE         ; Repeat
@@ -127,6 +128,21 @@ NEXT@
   ldy #0            ; Reset buffer fill pointer
   rts
 
+; Makes the input buffer case insensitive
+MKINSENSITIVE
+NEXTC@
+  lda BBVAR.input,x
+  cmpa #'z            ; Is the char outside the lowercase range?
+  bhi NOTLCASE@       ;  Yes? Skip offset part
+  cmpa #'a            ; Again on the other side of the range
+  blo NOTLCASE@
+  anda #$DF           ; -32
+NOTLCASE@
+  leax 1,x            ; Ready next char
+  cmpx BBVAR.cchinput ; Are we at the end?
+  bne NEXTC@          ;  No? Loop
+  rts
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;
 ;; Hex Conversion and Printing Routines
@@ -301,7 +317,8 @@ RUNIF
   beq NOTOK@
   ldx #0           ; Counting up from zero
   lda BBVAR.tokens ; Load token
-  tfr a,b          ; Get the index in D
+  tfr a,d          ; Get the index in D
+  clra
   asld             ; Cheaply << to get *2, pointer size
   tfr d,x          ; Move to X so we can use indexed mode with the offset
   jmp [IFPTRTBL,x] ; Select IF

src/memtest.s

@@ -1,44 +0,0 @@
-; CHIBI PC-09 Prototype #1 Boot ROM -- Memory Testing Routines
-; Copyright (c) 2024-2025 Amber Zeller, Gale Faraday
-; Licensed under MIT
-
-  INCLUDE "hardware.inc"
-  INCLUDE "serial.inc"
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;
-;; Memory Testing Routines
-;;
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-  SECTION MEMTEST
-
-  EXPORT RAMTEST
-
-; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for
-; MIKBUG.
-RAMTEST
-  ldx #STACK_TOP+1     ; bottom of testable SRAM, $0200
-AGAIN@                 ; Store 1 in memory
-  lda #1               ; Set [X] to 1
-  sta 0,x
-  cmpa 0,x             ; If failed print out an error indicator
-  bne ERR@
-NEXT@                  ; Loop point for next address
-  asla                 ; Shift A and [X] left
-  asl 0,x
-  cmpa 0,x             ; Compare A and [X]
-  bne ERR@
-  cmpa #$80            ; Only test up to $80
-  bne NEXT@            ; Loop if not $80
-  cmpx #$60FF          ; Compare X to end of RAM
-  beq PASS@            ; Finish if we're at the end
-  leax 1,x             ; Increment X
-  bra AGAIN@
-ERR@                   ; Write out error indicator
-  ldb #'X
-  jsr POUTCHAR
-PASS@                  ; Pass test
-  ldb #'P
-  jsr POUTCHAR
-  rts

src/reset.s

@@ -4,7 +4,6 @@
 
   INCLUDE "buzbee.inc"
   INCLUDE "hardware.inc"
-  INCLUDE "memtest.inc"
   INCLUDE "serial.inc"
   INCLUDE "version.inc"
 
@@ -51,4 +50,5 @@ ENTERMON
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 TXTRUN
-  fcn "<3RUN<3"
+  fcc "<3RUN<3"
+  fcb $0D,$0A,$00

src/utils.inc

@@ -1,7 +1,8 @@
-; CHIBI PC-09 Prototype #1 -- Memory Testing Routines Header
+; CHIBI PC-09 Prototype #1 -- BIOS Utilities Header
 ; Copyright (c) 2025 Amber Zeller, Gale Faraday
 ; Licensed under MIT
 
 ; vim: ft=asm
 
-RAMTEST IMPORT
+ROBIT IMPORT
+PRINTVER IMPORT

src/utils.s

@@ -0,0 +1,99 @@
+; CHIBI PC-09 Prototype #1 Boot ROM -- BIOS Utilities
+; Copyright (c) 2024-2025 Amber Zeller, Gale Faraday
+; Licensed under MIT
+
+  INCLUDE "hardware.inc"
+  INCLUDE "serial.inc"
+  INCLUDE "version.inc"
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; CHIBI/O Stable BIOS Interface
+;;
+;; Called through SWI3
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+  SECTION BIOSINT
+
+  EXPORT CHIBIO
+
+; CHIBI/O Entrypoint -- Stable, but defined by linkerscript $8800
+; @param A: Function ID
+CHIBIO
+  tfr a,d              ; 8-to-16 tfr, fill both a and b
+  clra                 ; Clear MSB
+  asld                 ; Convert to word offset
+  tfr d,x              ; Put in X for indexing mode
+  jmp [CHIBIOPTRTBL,x] ; Jump!
+
+; Jump table TODO: Document function IDs and pointers
+CHIBIOPTRTBL
+  fdb IOPRINTVER ; Print the firmware version string
+  fdb $0000      ; TODO: Interactive BIOS setup utilitiy call
+  fdb ROBIT      ; Access the ROBIT memory test
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; CHIBI/O Function Implementations
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; Prints the firmware's version information
+IOPRINTVER
+  PZSTR VERMSG
+  rti
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Memory Testing Routines
+;;
+;; This family of BIOS routines does not return, upon completion the CHIBI must
+;; be reset.
+;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+  SECTION MEMTEST
+
+  EXPORT ROBIT
+
+; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for
+; MIKBUG.
+ROBIT
+  ldx #STACK_TOP+1     ; bottom of testable SRAM, $0200
+AGAIN@                 ; Store 1 in memory
+  lda #1               ; Set [X] to 1
+  sta 0,x
+  cmpa 0,x             ; If failed print out an error indicator
+  bne ERR@
+NEXT@                  ; Loop point for next address
+  asla                 ; Shift A and [X] left
+  asl 0,x
+  cmpa 0,x             ; Compare A and [X]
+  bne ERR@
+  cmpa #$80            ; Only test up to $80
+  bne NEXT@            ; Loop if not $80
+  cmpx #$60FF          ; Compare X to end of RAM
+  beq PASS@            ; Finish if we're at the end
+  leax 1,x             ; Increment X
+  bra AGAIN@
+ERR@                   ; Write out error indicator
+  ldb #'X
+  jsr POUTCHAR
+PASS@                  ; Pass test
+  ldb #'P
+  jsr POUTCHAR
+  bra HALT
+
+; Prints a message about completing a memory test prompting the user to reset
+; then puts the MPU in a loop where it only responds to interrupts, effectively
+; halting the CHIBI
+HALT
+  PZSTR MSG_FINISH
+LOOP@
+  sync
+  bra LOOP@
+
+MSG_FINISH
+  fcc "Memory test finished! Please reset"
+  fcb $0D,$0A,$00

src/vecs.s

@@ -3,6 +3,7 @@
 ; Licensed under MIT
 
   INCLUDE "reset.inc"
+  INCLUDE "utils.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;
@@ -14,7 +15,7 @@
 
 VECTORS
   fdb $0000  ; Exception
-  fdb $0000 ; SWI3
+  fdb CHIBIO ; SWI3
   fdb $0000  ; SWI2
   fdb $0000  ; FIRQ
   fdb $0000  ; IRQ