Compare commits

...

3 Commits

Author SHA1 Message Date
08b85a186e remove old data from docs/ 2025-08-21 15:59:04 -04:00
9f28e315b7 clean up datasheets/ and remove outdated files 2025-08-21 15:57:33 -04:00
69836aa24b new pcb cleanup 2025-08-21 15:44:32 -04:00
36 changed files with 5 additions and 11 deletions

View File

@@ -27,4 +27,4 @@ Assembly is in progress.
## License
This project is licensed under the MIT license. This applies to both the hardware (schematics, bill of materials, pcb layouts) and documentation. This does *not* apply to the datasheets/ directory, the books/ directory or code/assist09/. Those files belong to their respective copyright holders.
This project is licensed under the MIT license. This applies to both the hardware (schematics, bill of materials, pcb layouts) and documentation. This does *not* apply to the datasheets/ directory or code/assist09/. Those files belong to their respective copyright holders.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

BIN
datasheets/mcp100.pdf Normal file

Binary file not shown.

Binary file not shown.

View File

@@ -1,6 +0,0 @@
TTL devices can handle CMOS input. HD6309 -> 74LS612
CMOS devices may or may not handle TTL input. 74LS612 -> peripherals
62256 SRAM, 28C256 EEPROM, 16550 UART all handle TTL input.
82C42 lists it's outputs as TTL compatible, but says nothing for inputs.
Must ensure all peripherals are rated for TTL input.

View File

@@ -3,7 +3,6 @@
File descriptions:
- links.txt contains useful links i would like to keep
- 6809-sn74ls612_timing.md contains notes on the mmu and cpu interface
- tech-spec.md contains basic info on layout of system (outdated)
- timing.html contains info on vga timing pulled from https://martin.hinner.info/vga/timing.html
- vga_ram.txt contains notes on ram size for the vga card

1
pcb/.gitignore vendored Normal file
View File

@@ -0,0 +1 @@
fp-info-cache

View File

@@ -1,6 +1,6 @@
{
"board": {
"active_layer": 5,
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
@@ -51,7 +51,7 @@
"shapes"
],
"visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
"zone_display_mode": 0
"zone_display_mode": 1
},
"git": {
"repo_type": "",
@@ -59,7 +59,7 @@
"ssh_key": ""
},
"meta": {
"filename": "prototype-1(v1.1).kicad_prl",
"filename": "prototype-1.kicad_prl",
"version": 5
},
"net_inspector_panel": {