start working on boot code, move things around

This commit is contained in:
2024-11-21 10:40:59 -05:00
parent fc115752e6
commit dcc1bea405
15 changed files with 79 additions and 6 deletions

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@@ -21,4 +21,4 @@ Prototype 1 is currently in progress. It will be a much simpler system. It will
## License ## License
This project is licensed under the MIT license. This applies to both the hardware (schematics, bill of materials, pcb layouts) and documentation. This does *not* apply to the datasheets/ directory, the code/books/ directory or code/assist09.asm. Those files belong to their respective copyright holders. This project is licensed under the MIT license. This applies to both the hardware (schematics, bill of materials, pcb layouts) and documentation. This does *not* apply to the datasheets/ directory, the books/ directory or code/assist09/assist09.asm. Those files belong to their respective copyright holders.

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# Code # Code
## assist09/
assist09.asm is the original motorola version, and relies on the as9 assembler found [here](http://home.hccnet.nl/a.w.m.van.der.horst/m6809.html). assist09.asm is the original motorola version, and relies on the as9 assembler found [here](http://home.hccnet.nl/a.w.m.van.der.horst/m6809.html).
assemble.sh will assemble assist09.asm to an s19 file and use gnu binutils objcopy to turn that into a bin file. assemble.sh will assemble assist09.asm to an s19 file and use gnu binutils objcopy to turn that into a bin file.
## boot/
the boot code for prototype 1, uses the lwtools assembler.
assemble.sh will assemble boot.s to an s19 file and use gnu binutils objcopy to turn that into a bin file.

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code/boot/assemble.sh Executable file
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lwasm --format=srec --output=boot.s19 boot.s
objcopy --input-target=srec --output-target=binary boot.s19 boot.bin
#mot2bin -out boot.bin boot.s19

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code/boot/boot.ld Normal file
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section code load 8000
pad FFFF
section vectors load FFF0

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code/boot/boot.s Normal file
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; CHIBI PC-09 Prototype #1 Boot ROM
; (Copyright (c) 2024 Amber Zeller
; UART registers
UART = $7F00
; When DLAB = 0
BUFR = UART ; TX/RX Buffer (Read for RX, Write for TX)
IER = UART + 1 ; Interrupt Enable Register
IIR = UART + 1 ; Interrupt Enable Register (Upon Read)
; When DLAB = 1
DLL = UART ; Divisor Latch (LSB)
DLM = UART + 1 ; Divisor Latch (MSB)
FCR = UART + 2 ; FIFO Control Register (Upon Write)
LCR = UART + 3 ; Line Control Register
MCR = UART + 4 ; MODEM Control Register
LSR = UART + 5 ; Line Status Register
MSR = UART + 6 ; MODEM Status Register
SCR = UART + 7 ; Scratch Register (Not for control just spare RAM)
; SECTION code
org $8000
RESET:
sta $cc
jmp RESET
fdb RESET
; ENDSECTION
; SECTION vectors
org $FFF0
; Reset/Interrupt Vectors
fdb $0000 ; Reserved
fdb $0000 ; SWI3
fdb $0000 ; SWI2
fdb $0000 ; FIRQ
fdb $0000 ; IRQ
fdb $0000 ; SWI
fdb $0000 ; NMI
fdb RESET ; Reset
; ENDSECTION

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code/boot/boot.s19 Normal file
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S01800005B6C77746F6F6C7320342E32335D20626F6F742E73BF
S10A800097CC7E8000800094
S113FFF0000000000000000000000000000080007D
S5030002FA
S9030000FC

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# Dev environment
USE:
- [lwtools](http://www.lwtools.ca/)
- [f9dasm](https://github.com/Arakula/f9dasm)
lwtools uses lwasm
f9dasm uses f9dasm

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# 6309 Board Prototype #1 Specs # 6309 Board Prototype #1 Specs
HD63C09 CPU @ 3MHz HD63C09 CPU @ 3MHz
HM62256BLP-7 SRAM AS6C62256-55 SRAM (32KB)
AT28C256-15 EEPROM SST39SF010A-70 FLASH (32KB Used)
ST16C550 UART @ 1.8342MHz (XO due to lack of 22pf 1.8432MHz XTALs) PC16550 UART @ 1.8342MHz
## Memory Map ## Memory Map
| Device | Location | | Device | Location |
|--------|-----------| |--------|-----------|
| EEPROM | 8000-FFFF | | FLASH | 8000-FFFF |
| UART | 7F00-7FFF | | UART | 7F00-7FFF |
| SRAM | 0000-7EFF | | SRAM | 0000-7EFF |
@@ -17,6 +17,6 @@ ST16C550 UART @ 1.8342MHz (XO due to lack of 22pf 1.8432MHz XTALs)
| A15 | A14-A9 | A8 | Chip | | A15 | A14-A9 | A8 | Chip |
|-----|--------|----|--------| |-----|--------|----|--------|
| H | x | x | EEPROM | | H | x | x | FLASH |
| L | x | L | SRAM | | L | x | L | SRAM |
| L | H | H | UART | | L | H | H | UART |