From 971dc1d719385fc6e4a53edf8f037139f3d1cdb1 Mon Sep 17 00:00:00 2001 From: Gale Faraday Date: Sat, 7 Dec 2024 10:30:15 -0600 Subject: [PATCH 1/6] feat: new serial functions --- code/boot/src/boot.s | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s index 7f13307..c53a826 100644 --- a/code/boot/src/boot.s +++ b/code/boot/src/boot.s @@ -10,6 +10,7 @@ ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + SECTION "Reset" ORG ROM_BASE RESET @@ -36,12 +37,44 @@ WAIT nop bra WAIT + SECTION "Serial" + +; Writes a char to the UART in non FIFO mode, preserves A. +; @param b: char to write +OUTCHAR + pshs a ; Preserve A +1 + lda UART_LSR ; if LSR.THRE == 1 then write + anda UARTF_LSR_THRE + bne 1B ; Loop if UART not ready yet + stb UART_BUFR ; Write char + puls a ; Restore A + rts + +; Writes a null terminated string to the UART in non FIFO mode, clobbers A and +; B. +; @param x: null terminated string start address. +OUTSTR + ldb x ; Get the next value from X + cmpb #$00 ; Make sure that mother is non-null + beq 2F + leax 1,x ; Increment X for our next char +1 ; Loop point for UART waiting + lda UART_LSR ; Wait for UART to be ready + anda UARTF_LSR_THRE + bne 1B + stb UART_BUFR ; Actually do our write + bra OUTSTR ; Reset for the next char +2 ; Jump point for End of routine + rts + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Interrupt and Reset Vectors ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + SECTION "Vectors" ORG VECS_BASE VECTORS From 9edc2554127e45f7d7606a9cbea43502dca18e0a Mon Sep 17 00:00:00 2001 From: Gale Faraday Date: Wed, 11 Dec 2024 05:30:33 -0600 Subject: [PATCH 2/6] style: caps in comment fix --- code/boot/src/boot.s | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s index c53a826..6c563b0 100644 --- a/code/boot/src/boot.s +++ b/code/boot/src/boot.s @@ -65,7 +65,7 @@ OUTSTR bne 1B stb UART_BUFR ; Actually do our write bra OUTSTR ; Reset for the next char -2 ; Jump point for End of routine +2 ; Jump point for end of routine rts ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; From a642e05c2c416df6857b4c5a3025af09c9e2f669 Mon Sep 17 00:00:00 2001 From: Gale Faraday Date: Wed, 11 Dec 2024 06:35:11 -0600 Subject: [PATCH 3/6] feat: ported ROBIT-2 for MIKBUG to CHIBI PC-09 --- code/boot/src/boot.s | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s index 6c563b0..56ee1ee 100644 --- a/code/boot/src/boot.s +++ b/code/boot/src/boot.s @@ -68,6 +68,38 @@ OUTSTR 2 ; Jump point for end of routine rts + SECTION "Memtest" + +; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for +; MIKBUG. +RAMTEST + ldx #SRAM_BASE ; Store 1 in memory + lda #1 + sta 0,x + cmpa 0,x + bne 1F +1 ; Loop point for next + asla ; Shift A and [X] left + asl 0,x + cmpa 0,x + bne 1F + cmpa #$80 ; Only test up to $80 + bne 1B + bra 2F +1 ; Write out error indicator + ldb #'X + jsr OUTCHAR + bra 3F ; Branch to finish +2 + cmpx #$60FF ; Compare X to end of RAM + beq 3F ; Finish if done, else try next address + leax 1,x + bra RAMTEST +3 + ldb #'P + jsr OUTCHAR + rts + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Interrupt and Reset Vectors From d2c5118ba279709de9125e69dad1c6f1ec77cb99 Mon Sep 17 00:00:00 2001 From: Gale Faraday Date: Wed, 11 Dec 2024 06:49:44 -0600 Subject: [PATCH 4/6] refactor(memtest): refactored the port of ROBIT-2 --- code/boot/src/boot.s | 32 +++++++++++++++----------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s index 56ee1ee..408ced3 100644 --- a/code/boot/src/boot.s +++ b/code/boot/src/boot.s @@ -73,29 +73,27 @@ OUTSTR ; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for ; MIKBUG. RAMTEST - ldx #SRAM_BASE ; Store 1 in memory - lda #1 + ldx #SRAM_BASE +1 ; Store 1 in memory + lda #1 ; Set [X] to 1 sta 0,x - cmpa 0,x - bne 1F -1 ; Loop point for next + cmpa 0,x ; If failed print out an error indicator + bne 3F +2 ; Loop point for next address asla ; Shift A and [X] left asl 0,x - cmpa 0,x - bne 1F + cmpa 0,x ; Compare A and [X] + bne 3F cmpa #$80 ; Only test up to $80 - bne 1B - bra 2F -1 ; Write out error indicator + bne 2B ; Loop if not $80 + cmpx #$60FF ; Compare X to end of RAM + beq 4F ; Finish if we're at the end + leax 1,x ; Increment X + bra 1B +3 ; Write out error indicator ldb #'X jsr OUTCHAR - bra 3F ; Branch to finish -2 - cmpx #$60FF ; Compare X to end of RAM - beq 3F ; Finish if done, else try next address - leax 1,x - bra RAMTEST -3 +4 ; Pass test ldb #'P jsr OUTCHAR rts From f6642860a5cbdd42e965136bb8d726e011fec2f8 Mon Sep 17 00:00:00 2001 From: Gale Faraday Date: Wed, 11 Dec 2024 06:35:11 -0600 Subject: [PATCH 5/6] feat: ported ROBIT-2 for MIKBUG to CHIBI PC-09 --- code/boot/src/boot.s | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s index 6c563b0..56ee1ee 100644 --- a/code/boot/src/boot.s +++ b/code/boot/src/boot.s @@ -68,6 +68,38 @@ OUTSTR 2 ; Jump point for end of routine rts + SECTION "Memtest" + +; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for +; MIKBUG. +RAMTEST + ldx #SRAM_BASE ; Store 1 in memory + lda #1 + sta 0,x + cmpa 0,x + bne 1F +1 ; Loop point for next + asla ; Shift A and [X] left + asl 0,x + cmpa 0,x + bne 1F + cmpa #$80 ; Only test up to $80 + bne 1B + bra 2F +1 ; Write out error indicator + ldb #'X + jsr OUTCHAR + bra 3F ; Branch to finish +2 + cmpx #$60FF ; Compare X to end of RAM + beq 3F ; Finish if done, else try next address + leax 1,x + bra RAMTEST +3 + ldb #'P + jsr OUTCHAR + rts + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Interrupt and Reset Vectors From 383559454810ccdf1c547c15bd800a0194141abf Mon Sep 17 00:00:00 2001 From: Gale Faraday Date: Wed, 11 Dec 2024 06:49:44 -0600 Subject: [PATCH 6/6] refactor(memtest): refactored the port of ROBIT-2 --- code/boot/src/boot.s | 32 +++++++++++++++----------------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s index 56ee1ee..408ced3 100644 --- a/code/boot/src/boot.s +++ b/code/boot/src/boot.s @@ -73,29 +73,27 @@ OUTSTR ; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for ; MIKBUG. RAMTEST - ldx #SRAM_BASE ; Store 1 in memory - lda #1 + ldx #SRAM_BASE +1 ; Store 1 in memory + lda #1 ; Set [X] to 1 sta 0,x - cmpa 0,x - bne 1F -1 ; Loop point for next + cmpa 0,x ; If failed print out an error indicator + bne 3F +2 ; Loop point for next address asla ; Shift A and [X] left asl 0,x - cmpa 0,x - bne 1F + cmpa 0,x ; Compare A and [X] + bne 3F cmpa #$80 ; Only test up to $80 - bne 1B - bra 2F -1 ; Write out error indicator + bne 2B ; Loop if not $80 + cmpx #$60FF ; Compare X to end of RAM + beq 4F ; Finish if we're at the end + leax 1,x ; Increment X + bra 1B +3 ; Write out error indicator ldb #'X jsr OUTCHAR - bra 3F ; Branch to finish -2 - cmpx #$60FF ; Compare X to end of RAM - beq 3F ; Finish if done, else try next address - leax 1,x - bra RAMTEST -3 +4 ; Pass test ldb #'P jsr OUTCHAR rts