From a642e05c2c416df6857b4c5a3025af09c9e2f669 Mon Sep 17 00:00:00 2001
From: Gale Faraday <k4mu1kazum4@gmail.com>
Date: Wed, 11 Dec 2024 06:35:11 -0600
Subject: [PATCH 1/2] feat: ported ROBIT-2 for MIKBUG to CHIBI PC-09

---
 code/boot/src/boot.s | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s
index 6c563b0..56ee1ee 100644
--- a/code/boot/src/boot.s
+++ b/code/boot/src/boot.s
@@ -68,6 +68,38 @@ OUTSTR
 2                      ; Jump point for end of routine
   rts
 
+  SECTION "Memtest"
+
+; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for
+; MIKBUG.
+RAMTEST
+  ldx #SRAM_BASE       ; Store 1 in memory
+  lda #1
+  sta 0,x
+  cmpa 0,x
+  bne 1F
+1                      ; Loop point for next
+  asla                 ; Shift A and [X] left
+  asl 0,x
+  cmpa 0,x
+  bne 1F
+  cmpa #$80            ; Only test up to $80
+  bne 1B
+  bra 2F
+1                      ; Write out error indicator
+  ldb #'X
+  jsr OUTCHAR
+  bra 3F               ; Branch to finish
+2
+  cmpx #$60FF          ; Compare X to end of RAM
+  beq 3F               ; Finish if done, else try next address
+  leax 1,x
+  bra RAMTEST
+3
+  ldb #'P
+  jsr OUTCHAR
+  rts
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;
 ;; Interrupt and Reset Vectors

From d2c5118ba279709de9125e69dad1c6f1ec77cb99 Mon Sep 17 00:00:00 2001
From: Gale Faraday <k4mu1kazum4@gmail.com>
Date: Wed, 11 Dec 2024 06:49:44 -0600
Subject: [PATCH 2/2] refactor(memtest): refactored the port of ROBIT-2

---
 code/boot/src/boot.s | 32 +++++++++++++++-----------------
 1 file changed, 15 insertions(+), 17 deletions(-)

diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s
index 56ee1ee..408ced3 100644
--- a/code/boot/src/boot.s
+++ b/code/boot/src/boot.s
@@ -73,29 +73,27 @@ OUTSTR
 ; RAM testing routine. Ported to 6809 from 6800, based on source for ROBIT-2 for
 ; MIKBUG.
 RAMTEST
-  ldx #SRAM_BASE       ; Store 1 in memory
-  lda #1
+  ldx #SRAM_BASE
+1                      ; Store 1 in memory
+  lda #1               ; Set [X] to 1
   sta 0,x
-  cmpa 0,x
-  bne 1F
-1                      ; Loop point for next
+  cmpa 0,x             ; If failed print out an error indicator
+  bne 3F
+2                      ; Loop point for next address
   asla                 ; Shift A and [X] left
   asl 0,x
-  cmpa 0,x
-  bne 1F
+  cmpa 0,x             ; Compare A and [X]
+  bne 3F
   cmpa #$80            ; Only test up to $80
-  bne 1B
-  bra 2F
-1                      ; Write out error indicator
+  bne 2B               ; Loop if not $80
+  cmpx #$60FF          ; Compare X to end of RAM
+  beq 4F               ; Finish if we're at the end
+  leax 1,x             ; Increment X
+  bra 1B
+3                      ; Write out error indicator
   ldb #'X
   jsr OUTCHAR
-  bra 3F               ; Branch to finish
-2
-  cmpx #$60FF          ; Compare X to end of RAM
-  beq 3F               ; Finish if done, else try next address
-  leax 1,x
-  bra RAMTEST
-3
+4                      ; Pass test
   ldb #'P
   jsr OUTCHAR
   rts