From 4a50a80e1f1a48f43931b4a25208ea086a7b06c8 Mon Sep 17 00:00:00 2001
From: Amber <amberisvibin@gmail.com>
Date: Fri, 22 Nov 2024 10:17:26 -0500
Subject: [PATCH] style: prettier math (thx asm6809), add MIT license to
 boot.s, remove stray (

---
 code/boot/src/boot.s | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/code/boot/src/boot.s b/code/boot/src/boot.s
index 97d5b03..c95050b 100644
--- a/code/boot/src/boot.s
+++ b/code/boot/src/boot.s
@@ -1,23 +1,24 @@
 ; CHIBI PC-09 Prototype #1 Boot ROM
-; (Copyright (c) 2024 Amber Zeller
+; Copyright (c) 2024 Amber Zeller
+; Licensed under MIT
 
 ; UART registers
 UART EQU $7F00
 
 ; When DLAB = 0:
-BUFR EQU UART  ; TX/RX Buffer (Read for RX, Write for TX)
-IER EQU UART+1 ; Interrupt Enable Register
-IIR EQU UART+1 ; Interrupt Enable Register (Upon Read)
+BUFR EQU UART    ; TX/RX Buffer (Read for RX, Write for TX)
+IER EQU UART + 1 ; Interrupt Enable Register
+IIR EQU UART + 1 ; Interrupt Ident Register (Upon Read)
 ; When DLAB = 1
-DLL EQU UART   ; Divisor Latch (LSB)
-DLM EQU UART+1 ; Divisor Latch (MSB)
+DLL EQU UART     ; Divisor Latch (LSB)
+DLM EQU UART + 1 ; Divisor Latch (MSB)
 
-FCR EQU UART+2 ; FIFO Control Register (Upon Write)
-LCR EQU UART+3 ; Line Control Register
-MCR EQU UART+4 ; MODEM Control Register
-LSR EQU UART+5 ; Line Status Register
-MSR EQU UART+6 ; MODEM Status Register
-SCR EQU UART+7 ; Scratch Register (Not for control just spare RAM)
+FCR EQU UART + 2 ; FIFO Control Register (Upon Write)
+LCR EQU UART + 3 ; Line Control Register
+MCR EQU UART + 4 ; MODEM Control Register
+LSR EQU UART + 5 ; Line Status Register
+MSR EQU UART + 6 ; MODEM Status Register
+SCR EQU UART + 7 ; Scratch Register (Not for control just spare RAM)
 
   ORG $8000